The present invention relates generally to chopper stabilized amplifiers that include notch filters to reduce output voltage ripple, and more particularly to circuitry and methods that provide improved stability at high amplifier bandwidth.
The prior art is believed to include the commonly assigned pending patent application Ser. No. 11/340,223 filed Jan. 26, 2006, entitled “Notch Filter for Ripple Reduction and Chopper Stabilized Amplifiers” by Rodney T. Burt and Joy Y. Zhang, and incorporated herein by reference.
It is highly desirable that integrated circuit operational amplifiers have low offset voltage, low noise, low offset voltage drift, and good signal stability. Chopper stabilization and auto-zeroing are two common techniques that have been widely used to reduce amplifier offset thereof voltage and drift. Modern chopper-stabilized operational amplifiers and autozero operational amplifiers have significantly reduced, or even essentially eliminated, the amount switching noise therein compared to previous designs. However, the improved design techniques used in modern chopper-stabilized operational amplifiers and auto-zero operational amplifiers result in trade-offs between input referred noise and quiescent supply current (Iq). The auto-zeroing method provides low ripple noise at the amplifier output, and the in-band noise is high due to aliasing or noise folding. On the other hand, the chopper stabilization presents lower in-band noise due to absence of noise folding, but its output ripple noise is higher. Basic chopper-stabilized amplifiers maintain the broadband noise characteristics of their input stages, but “shift” their input offset voltages up to the chopping frequency, creating large ripple voltages at the amplifier outputs.
Above mentioned Ser. No. 11/340,223 provides a solution to the foregoing trade-offs. Referring to Prior Art FIG. 1, which is a copy of FIG. 3A of Ser. No. 11/340,223, shows a operational amplifier 1 which receives an input signal Vin that is applied to input chopping circuitry 9. Input chopping circuitry 9 includes switches 9-1 and 9-2 connected to (−) input conductor 7A and switches 9-3 and 9-4 connected to (+) input conductor 7B. Switches 9-1 and 9-3 are connected by conductor 12A to the (+) input of operational transconductance amplifier 2, and switches 9-2 and 9-4 are connected by conductor 12B to the (−) input of operational transconductance amplifier 2. Output conductors 13A and 13B of operational transconductance amplifier 2 are connected to output chopping circuitry 10, which includes switches 10-1 and 10-2 connected to conductor 13A and switches 10-3 and 10-4 connected to conductor 13B. Chopper switches 10-1 and 10-3 are connected to conductor 14A, and chopper switches 10-2 and 10-4 are connected to conductor 14B. The chopped output of operational transconductance amplifier 2 produced between conductors 14A and 14B is applied to the differential inputs of a switched capacitor notch filter 15. Conductor 14B is also connected to one terminal of a capacitor C3b, the other terminal of which is connected to ground. Conductor 14A also is connected to one terminal of a compensation capacitor C2b, the other terminal of which is connected to Vout conductor 25.
Switched capacitor notch filter 15 (which is a low pass filter with notches at the chopping frequency fs and its harmonics) includes switch 16A connected between conductors 14A and 17, switch 16B connected between conductors 14B and 18, switch 16C connected between conductors 14A and 19, and switch 16D connected between conductors 14B and 20. An “integrate and transfer” capacitor C5 is connected between conductors 17 and 18, and another “integrate and transfer” capacitor C6 is connected between conductors 19 and 20. Switched capacitor notch filter 15 also includes switch 21A connected between conductors 17 and 22A, switch 21B connected between conductors 19 and 22A, switch 21C connected between conductors 18 and 22B, and switch 21D connected between conductors 20 and 22B. Capacitor C4 is connected between output conductors 22A and 22B of notch filter 15. The (+) input conductor 7B of operational amplifier 1 is connected to the (−) input of operational transconductance amplifier 5, the (+) input of which is connected to the (−) input conductor 7A of operational amplifier 1. The output of a feed-forward operational transconductance amplifier 5 is connected by conductor 23 to the (−) input of operational amplifier 4, which alternatively can be a transconductance operational amplifier.
Notch filter 15 includes two parallel signal paths, each with switches operating at the same frequency fs as the chopping signals shown in FIG. 2A but with a ¼ period delay. The ¼ period delays allow integrating of the amplified signal and the offset of input operational transconductance amplifier 2 in half the cycle of the chopping frequency. However, it should be noted that the switching frequency of notch filter 15 can be different than the chopping frequency fs. For example, the switching frequency of notch filter 15 can be one half of the chopping frequency fs, with no delay, in which case the amplified signal and the offset and ripple components therein are integrated over an entire chopping frequency cycle, as shown in FIG. 2B.
Notch filter output conductor 22A is connected to the (+) input of operational transconductance amplifier 3 and to one terminal of a compensation capacitor C2a, the other terminal of which is connected to output conductor 25. Notch filter output conductor 22B is connected to the (−) input of operational transconductance amplifier 3 and to one terminal of a capacitor C3a, the other terminal of which is connected to ground. The output of operational transconductance amplifier 3 is connected by conductor 23 to the (−) input of transconductance operational amplifier or operational amplifier 4 (hereinafter referred to as operational amplifier 4), the output of which is connected to output conductor 25 and the (+) input of which is connected to ground. Conductor 23 also is connected to one terminal of compensation capacitor C1, the other terminal of which is connected to output conductor 25.
The two timing diagrams shown in FIG. 2A and FIG. 2B, respectively, each illustrate four synchronized clock signals Phase1, Phase2, Phase3, and Phase4 which can be used to control the various chopping switches and filter switches as shown in FIG. 1. Phase1 controls chopping switches 9-1, 9-4, 10-1, and 10-4, and Phase2 controls chopping switches 9-2, 9-3, 10-2, and 10-3. Phase3 controls notch filter switches 16A, 16B, 21B, and 21D, and Phase4 controls switches 16C, 16D, 21A and 21C. The Phase1 and Phase2 chopping signals are the same in FIGS. 2A and 2B. In FIG. 2A the Phase3 and Phase4 notch filter clocking signals operate at the same frequency fs as the chopping signals Phase1 and Phase2 but are 90 degrees out of phase with them. However, in FIG. 2B the Phase3 and Phase4 notch filter clocking signals operate at half the chopping frequency, i.e. at fs/2, as the chopping signals Phase1 and Phase2 but in phase with them.
Note that in the subsequently described drawings, Phase1 is also referred to as CHOPCLK, Phase2 is also referred to as CHOPCLK, Phase3 is referred to as FILTERCLK, and Phase4 is also referred to as FILTERCLK, so both names for each waveform are indicated in FIG. 2A.
In notch filter input conductors 14A and 14B there are currents from transconductance stage 2, and the net current through conductors 14A and 14B is integrated during one of Phase1 and Phase2 onto integrate and transfer capacitor C5, and during the other phase the net current is integrated onto the other integrate and transfer capacitor C6. This results in all of the signal charge being available on integrate and transfer capacitors C5 and C6, and all of the signal charge is available for redistribution to the next stage, i.e. to the capacitance coupled to notch filter output conductors 22A and 22B. This is advantageous because any loss of signal charge may result in loss of signal information and hence reduced signal-to-noise ratio, and also tends to produce offset voltages and aliasing of noise.
More specifically, in the operation of notch filter 15 one signal path integrates the amplified and chopped signal (including the ripple current resulting from the offset voltage) from operational transconductance amplifier 2 on the integrate and transfer capacitor C5 during one half of the notch filter switching cycle. During the same interval the other signal path “transfers” the amplified signal (including the ripple current resulting from the offset voltage) from integrate and transfer capacitor C6 to operational transconductance amplifier 3. During the next half cycle of operation of notch filter 15, the integrate and transfer functions of the two signal paths are reversed. The frequency response of notch filter 15 includes notches at the chopping frequency spectrum values of fs and its harmonics, so the notches suppress the ripple voltages that usually occur in a conventional chopper-stabilized amplifier.
Chopper stabilized operational amplifier 1 of Prior Art FIG. 1 uses a switched capacitor notch filter with synchronous integration in a continuous time signal path to reduce chopping noise well below the total rms noise of the operational amplifier. The operational amplifier maintains the benefits of chopper stabilization while attenuating the ripple voltage at the chopping frequency fs.
Prior Art FIG. 3 shows a somewhat simplified block diagram representation 1A of the same circuit shown in FIG. 1 having a chopping stage, notch filter and feed forward stage. Transconductance stage 5 is shown having a differential output between conductors 23A and 23B. Block 35 contains the input chopping switches 9, which are the same as switches 9-1,2,3,4 as shown in FIG. 1, and similarly block 40 contains the output chopping switches 10, which are the same as switches 10-1,2,3,4 as shown in FIG. 1. The chopping clock signal CHOPCLK on conductor 43 is applied to the control (CTL) inputs (not shown) of various input chopping switches 9 and various output chopping switches 10 and also is applied to the input of an inverter 41 which produces the logical complement of CHOPCLK and applies it to the CTL inputs (not shown) of various input chopping switches 9 and the various output chopping switches 10. CHOPCLK can be the same as Phase1 in FIG. 2A, and the logical complement of CHOPCLK can be the same as Phase2 in FIG. 2A. The input chopping switches 9 and output chopping switches 10 typically are implemented by means of CMOS transmission gates. Similarly, filter clock signal FILTERCLK on conductor 51 is applied to the CTL inputs (not shown) of various switches 16 and 21 in notch filter 15 and also is applied to the input of an inverter 52 which produces the logical complement of FILTERCLK and applies it to the CTL inputs (not shown) of various switches 16 and 21 in notch filter 15. FILTERCLK can be the same as Phase3 in FIG. 2A, and the logical complement of FILTERCLK can be the same as Phase4 in FIG. 2A. Transconductance stages 3 and 4 in block 3,4 of Prior Art FIG. 1 are combined in the same manner in block 3,4 in FIG. 3, wherein the two inputs IN1(+) and IN1(−) are the inputs of the gm3 transconductance stage and the two inputs IN2(+) and IN2(−) are the inputs of the gm2 transconductance stage in FIG. 3.
The prior art chopper stabilized amplifier in FIGS. 1 and 3 provides the advantages of both low in-band noise and the absence of noise folding. Notch filter 15 greatly reduces the ripple and preserves the low offset, low drift and low noise of the basic chopper stabilized amplifier topology, but unfortunately also creates a delay associated with the transfer function of the chopped signal path. This notch filter delay creates stability problems that increase as the amplifier bandwidth increases. The delay and stability problems also have an undesirable effect on output noise of the chopper stabilized amplifier at high frequency. One way to improve the amplifier stability is to increase the chopping frequency. This solves the above mentioned stability problem, but then the increased frequency does not allow sufficient time to fully recharge the parasitic capacitances on output conductors 13A and 13B of transconductance stage 2. This reduces the effective gain of the circuitry including input chopper 9, transconductance stage 2, and output chopper 10 of chopper stabilized amplifier 1A, and accordingly degrades its offset voltage and drift thereof. The charge injection from the switches and the non-ideal 50% duty cycle of the clock signal sources contribute to increasing the amplifiers offset and drift as the chopping frequency increases.
To summarize, notch filter 15 creates a delay in the signal path. During a time interval equal to one half of the delay in notch filter 15, integrate and transfer capacitor C5 in FIG. 1 is connected to the output of transconductance stage gm1 and integrate and transfer capacitor C6 is connected to the input of transconductance stage gm2. During that time interval the present input voltage Vin+-Vin− applied between the input conductors 7A and 7B causes a corresponding effect voltage on capacitor C5, but capacitor C5 is not connected to the input of transconductance stage gm2. There is a delay time interval during which there is no connection between transconductance stages gm1 and gm2. Later, after the roles of integrate and transfer capacitors C5 and C6 have been reversed, C5 is coupled to the (+) input of transconductance stage gm2, and only then is the corresponding effect voltage transferred from transconductance stage gm1 to Vout. The notch filter delay, which is a constant phase delay in the signal path, creates a stability problem for the chopper stabilized amplifier of FIGS. 1 and 3. The foregoing phase delay decreases the phase margin and hence decreases the stability of the chopper stabilized amplifier of FIGS. 1 and 3. Increasing the chopping frequency (which might not even be a viable option) would reduce the notch filter delay and would cause several problems. One problem is that transconductance stage gm1 would become less able to reduce the input-referred offset of transconductance stage gm4 because during every cycle transconductance stage gm1 must recharge parasitic capacitances on its output. That results in reduction of the offset and offset drift of the chopper stabilized amplifier and also increases its input bias current.
Thus, there is an unmet need for an economical, low ripple chopper stabilized amplifier and method which avoid the increased noise, reduced gain, increased offset, and increased offset drift that occur if the chopping frequency is increased to improve the stability in the prior art chopper stabilized amplifiers which include a notch filter.
There also is an unmet need for an economical, low ripple chopper stabilized amplifier and method which avoid the increase in input bias current that occurs if the chopping frequency is increased to improve the stability in the prior art chopper stabilized amplifiers which include a notch filter.
There also is an unmet need for an economical, low ripple chopper stabilized amplifier and method which provide higher amplifier bandwidth while preserving low offset and drift, without increasing the chopping frequency.
There also is an unmet need for an economical, low ripple chopper stabilized amplifier and method which is usable in applications that do not allow use of increased chopping frequency because of system constraints.